Many silicon vendors rely on multicore architectures to improve performance. The same vendors have failed to deliver compilation tools that are effective in the hands of the vast majority of software developers. The few tools that are available require both a good understanding of the application and a deep understanding of the target platform. As a result few engineers can exploit multicore architectures to their full potential, raising the bar for many companies to benefit from multicore silicon.
In many cases the design of an embedded system starts with a software collection that has not yet been partitioned to match the multicore structure of the target hardware. As a result, the software does not meet its performance requirements and hardware resources are left idle. To resolve this, an expert (or a team of experts) comes in to change the software so that it fits the target multicore structure. Here is what these experts do.
Figure 1 visualizes this process. Clearly there are many problems with this design flow. Experts that can successfully complete this flow are a rare breed. Even if you can find them, at the start of a project it is hard to predict how many improvement and bug fix iterations the experts need to go through until the system stabilizes. Therefore product development lead times are uncertain and project costs are hard to control.
Multicore platforms are quickly becoming a very attractive option in terms of their cost-performance ratio. But they also become more complex every year, making it harder for developers to benefit from this technology. Pareon enables software developers to realize the highest possible performance on their multicore as shown in Figure 2. Pareon analyzes the program and then focuses the programmers attention on the hot spots, finds the loops that can be parallelized and shows the impact of loop parallelization on the overall system cost and performance. This information is visualized and presented to the system programmer through an intuitive graphical user interface. With all information immediately available, the programmer can select his preferred optimization and parallelization strategy and then receive detailed instructions from Pareon on how to implement that strategy with the confidence that it will not introduce data races or deadlocks, and with prior knowledge of the costs and performance of the final result.
In addition to supporting the programmer, Pareon also enables the manager of a multicore project to estimate in an early stage how much time and engineering resources will be needed to optimize an application on a particular multicore target. This greatly reduces the risk of multicore projects and results in predictable product delivery lead times.